[Skyeye-developer] How to integrate support for FLASH NAND memory in 6500 chipset

[Smirnov Dmitry]

Hi,

 

I'm trying to evaluate the Skyeye as a simulation tool for Qualcomm's
6500 chipset.

It is based on ARM926EJ-S.

 

Right now, I see some issues with FLASH NAND support provided by this
chipset.

As I understand, Skyeye provides support for FLASH memory, but this
seems to be inapplicable for 6500. The problem is that this memory in
6500 is accessed by mean of some specific registers mapped into ARM
memory space.

To read some memory from FLASH, you need to program those registers and
wait for operation complete (this could be indicated by interrupt also).
Upon completion, some internal chipset RAM buffer (also mapped to ARM
memory space) contains the data which should be copied to destination
buffer (in conventional RAM).

 

So, I need some advice, how to implement this.

 

I suppose, I need to implement some 'machine' and add this FLASH
functionality. 

The problem I see here is that I need to specify some details about this
memory (size of the FLASH NAND, its specific parameters maybe). Also,
this memory should be initialized by some data (for instance, read from
the file on skyeye startup). For this, I will need to add some arguments
to 'mach:' configuration line.

Since 6500 has a lot of such devices (UART, GPIO, etc.), 'mach' will
probably have a lot of config parameters. I believe this is not good. I
would prefer to use the 'device' conception provided by Skyeye. But it
seems is not suitable for this purpose: according to skyeye approach,
these devices should be mapped into address space. In this case, I
should create separate devices for FLASH, GPIO, etc. Nevertheless, these
devices should be integrated somehow into one 'machine'.

 

So, I would appreciate any suggestions on how to implement 6500 in the
best way.

 

Dmitry

 

 

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