[Skyeye-developer] s3c2410x ecos/redboot progress
Mike Dorin
bsddorin at yahoo.com
Tue Apr 3 02:44:10 CST 2007
Thanks so much for your help.
The patch seems to have done some good.
I now only see two addresses with an error:
ERROR: s3c2410x_io_write_word(0x4c000004) = 0x00054011
ERROR: s3c2410x_io_write_word(0x4c000000) = 0x00ffffff
Here is how I build redbooot:
1) Download the latest snapshot and build ti
[http://ecos.sourceware.org/anoncvs.html]
2) Create a new directory for the ecos/redboot build
and cd to it.
3) ecosconfig new smdk2410 redboot
4) ecosconfig import cosconfig import ${PATH TO
ECOS}/ecos/packages/hal/arm/arm9/smdk2410/current/misc/smdk2410_redboot_ROMRAM.ecm
5) ecosconfig tree
6) make
7) goto install/bin and you will find the
binaries of redboot.
Thanks again for all your help. It is very
much appreciated.
-Mike
--- kang shuo <blackfin.kang at gmail.com> wrote:
> Hi, Mike:
> Hope the patch in the attachement can solve some
> issues of yours.
> You can donwload the patch . And run the following
> command under
> SKYEYE source directory(PATCH means the patch file
> name):
> cat PATCH|patch -p0
>
> -- Thanks
> -- Michael.Kang
>
> On 4/1/07, Mike Dorin <bsddorin at yahoo.com> wrote:
> >
> >
> > Did a couple of things. See below for the output.
> > Thoughts?
> > -Mike
> >
> >
> > Skyeye.conf
> >
> > cpu: arm920t
> > mach: s3c2410x
> > mem_bank: map=M, type=RW, addr=0x00000000,
> > size=0x00800000,file=./redboot.elf
> > mem_bank: map=I, type=RW, addr=0x48000000,
> > size=0x20000000
> >
> > output:
> > ERROR: s3c2410x_io_write_word(0x4800001c) =
> 0x00018005
> > ERROR: s3c2410x_io_write_word(0x48000020) =
> 0x00018005
> > ERROR: s3c2410x_io_write_word(0x48000024) =
> 0x008e0459
> > ERROR: s3c2410x_io_write_word(0x48000028) =
> 0x00000032
> > ERROR: s3c2410x_io_write_word(0x4800002c) =
> 0x00000030
> > ERROR: s3c2410x_io_write_word(0x48000030) =
> 0x00000030
> > ERROR: s3c2410x_io_write_word(0x4c000004) =
> 0x00054011
> > ERROR: s3c2410x_io_write_word(0x53000000) =
> 0x00000000
> > ERROR: s3c2410x_io_write_word(0x4c000000) =
> 0x00ffffff
> > ERROR: s3c2410x_io_write_word(0x48000000) =
> 0x22111120
> > ERROR: s3c2410x_io_write_word(0x48000004) =
> 0x00000700
> > ERROR: s3c2410x_io_write_word(0x48000008) =
> 0x00000700
> > ERROR: s3c2410x_io_write_word(0x4800000c) =
> 0x00000700
> > ERROR: s3c2410x_io_write_word(0x48000010) =
> 0x00000700
> > ERROR: s3c2410x_io_write_word(0x48000014) =
> 0x00000700
> > ERROR: s3c2410x_io_write_word(0x48000018) =
> 0x00000700
> > ERROR: s3c2410x_io_write_word(0x4800001c) =
> 0x00018005
> > ERROR: s3c2410x_io_write_word(0x48000020) =
> 0x00018005
> > ERROR: s3c2410x_io_write_word(0x48000024) =
> 0x008e0459
> > ERROR: s3c2410x_io_write_word(0x48000028) =
> 0x00000032
> > ERROR: s3c2410x_io_write_word(0x4800
> >
> >
> >
> >
> >
> >
> >
> > ~
> >
> > ~
> >
> >
> >
> >
>
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> >
> > Index: arch/arm/mach/skyeye_mach_s3c2410x.c
>
===================================================================
> --- arch/arm/mach/skyeye_mach_s3c2410x.c (revision
> 160)
> +++ arch/arm/mach/skyeye_mach_s3c2410x.c (working
> copy)
> @@ -35,7 +35,19 @@
>
> /* 2007-01-18 added by Anthony Lee : for new uart
> device frame */
> #include "skyeye_uart.h"
> -
> +typedef struct s3c2410_memctl_s{
> + uint32_t bwscon;
> + uint32_t bankcon[8];
> + uint32_t refresh;
> + uint32_t banksize;
> + uint32_t mrsrb6;
> + uint32_t mrsrb7;
> +}s3c2410_memctl_t;
> +typedef struct s3c2410_wd_timer_s{
> + uint32_t wtcon;
> + uint32_t wtdat;
> + uint32_t wtcnt;
> +}s3c2410_wd_timer_t;
> typedef struct s3c2410x_io
> {
> u32 srcpnd; /* Indicate the interrupt request
> status */
> @@ -52,6 +64,8 @@
> struct s3c2410x_timer_io timer; /* Timer */
> struct s3c2410x_uart_io uart0; /* uart0 */
> struct s3c2410x_clkpower clkpower; /* clock and
> power management */
> + s3c2410_memctl_t memctl;
> + s3c2410_wd_timer_t wd_timer;
> uint32_t gpio_ctl[0xc0]; /* GPIO control register
> */
>
> } s3c2410x_io_t;
> @@ -485,6 +499,55 @@
> case CLKDIVN:
> data = io.clkpower.clkdivn;
> break;
> + case BWSCON:
> + data = io.memctl.bwscon;
> + break;
> + case BANKCON0:
> + data = io.memctl.bankcon[0];
> + break;
> + case BANKCON1:
> + data = io.memctl.bankcon[1];
> + break;
> + case BANKCON2:
> + data = io.memctl.bankcon[2];
> + break;
> + case BANKCON3:
> + data = io.memctl.bankcon[3];
> + break;
> + case BANKCON4:
> + data = io.memctl.bankcon[4];
> + break;
> + case BANKCON5:
> + data = io.memctl.bankcon[5];
> + break;
> + case BANKCON6:
> + data = io.memctl.bankcon[6];
> + break;
> + case BANKCON7:
> + data = io.memctl.bankcon[7];
> + break;
> + case REFRESH:
> + data = io.memctl.refresh;
> + break;
> + case BANKSIZE:
> + data = io.memctl.banksize;
> + break;
> + case MRSRB6:
> + data = io.memctl.mrsrb6;
> + break;
> + case MRSRB7:
> + data = io.memctl.mrsrb7;
> + break;
> + case WDCON:
> + data = io.wd_timer.wtcon;
> + break;
> + case WDDAT:
> + data = io.wd_timer.wtdat;
> + break;
> + case WDCNT:
> + data = io.wd_timer.wtcnt;
> + break;
> +
> default:
> //fprintf(stderr, "ERROR: %s(0x%08x) \n",
> __FUNCTION__, addr);
> break;
> @@ -576,7 +639,54 @@
> case CLKDIVN:
> io.clkpower.clkdivn = data;
> break;
> -
> + case BWSCON:
> + io.memctl.bwscon = data;
> + break;
> + case BANKCON0:
> + io.memctl.bankcon[0] = data;
> + break;
> + case BANKCON1:
> + io.memctl.bankcon[1] = data;
> + break;
> + case BANKCON2:
> + io.memctl.bankcon[2] = data;
> + break;
> + case BANKCON3:
> + io.memctl.bankcon[3] = data;
> + break;
> + case BANKCON4:
> + io.memctl.bankcon[4] = data;
> + break;
> + case BANKCON5:
> + io.memctl.bankcon[5] = data;
> + break;
> + case BANKCON6:
> + io.memctl.bankcon[6] = data;
> + break;
> + case BANKCON7:
> + io.memctl.bankcon[7] = data;
> + break;
> + case REFRESH:
> + io.memctl.refresh = data;
> + break;
> + case BANKSIZE:
> + io.memctl.banksize = data;
> + break;
> + case MRSRB6:
> + io.memctl.mrsrb6 = data;
> + break;
> + case MRSRB7:
> + io.memctl.mrsrb7 = data;
> + break;
> + case WDCON:
> + io.wd_timer.wtcon = data;
> + break;
> + case WDDAT:
> + io.wd_timer.wtdat = data;
> + break;
> + case WDCNT:
> + io.wd_timer.wtcnt = data;
> + break;
> default:
> SKYEYE_DBG ("io_write_word(0x%08x) = 0x%08x\n",
> addr, data);
> fprintf(stderr, "ERROR: %s(0x%08x) = 0x%08x\n",
> __FUNCTION__, addr ,data);
> Index: arch/arm/mach/s3c2410x.h
>
===================================================================
> --- arch/arm/mach/s3c2410x.h (revision 160)
> +++ arch/arm/mach/s3c2410x.h (working copy)
> @@ -216,7 +216,16 @@
> #define BCDDAY RTC_CTL_BASE+(0x80)
> #define BCDMON RTC_CTL_BASE+(0x84)
> #define BCDYEAR RTC_CTL_BASE+(0x88)
> +/***************************/
> +/* WatchDog Timer Registers */
> +/***************************/
>
> +#define WD_TIMER_BASE 0x53000000
> +
> +#define WDCON (WD_TIMER_BASE + 0)
> +#define WDDAT (WD_TIMER_BASE + 0x4)
> +#define WDCNT (WD_TIMER_BASE + 0x8)
> +
> /***************************/
> /* PWM Timer Registers */
> /***************************/
> > _______________________________________________
> Skyeye-developer mailing list
> Skyeye-developer at lists.gro.clinux.org
>
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>
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